Sheet1
AVR instruction set overview
Opcode Mnemonics Operands Operand range Flags Words Cycles Operation Core version Emulated as Description and notes
Arithmetic and logic instructions
0000 11rd dddd rrrr ADD Rd Rr 0-31 0-31 Z,C,N,V,S,H 1 1 Rd = Rd + Rr V0
0001 11rd dddd rrrr ADC Rd Rr 0-31 0-31 Z,C,N,V,S,H 1 1 Rd = Rd + Rr + C
1001 0110 KKdd KKKK ADIW Rd K 24,26,28,30 0-63 Z,C,N,V,S 1 2 Rd+1:Rd = Rd+1:Rd + K V1
0001 10rd dddd rrrr SUB Rd Rr 0-31 0-31 Z,C,N,V,S,H 1 1 Rd = Rd - Rr
0101 KKKK dddd KKKK SUBI Rd K 16-31 0-255 Z,C,N,V,S,H 1 1 Rd = Rd - K
0000 10rd dddd rrrr SBC Rd Rr 0-31 0-31 Z,C,N,V,S,H 1 1 Rd = Rd - Rr - C
0100 KKKK dddd KKKK SBCI Rd K 16-31 0-255 Z,C,N,V,S,H 1 1 Rd = Rd - K - C
1001 0111 KKdd KKKK SBIW Rd K 24,26,28,30 0-63 Z,C,N,V,S 1 2 Rd+1:Rd = Rd+1:Rd - K V1
0010 00rd dddd rrrr AND Rd Rr 0-31 0-31 Z,N,V,S 1 1 Rd = Rd & Rr
0111 KKKK dddd KKKK ANDI Rd K 16-31 0-255 Z,N,V,S 1 1 Rd = Rd & K
0010 10rd dddd rrrr OR Rd Rr 0-31 0-31 Z,N,V,S 1 1 Rd = Rd | Rr
0110 KKKK dddd KKKK ORI Rd K 16-31 0-255 Z,N,V,S 1 1 Rd = Rd | K
0010 01rd dddd rrrr EOR Rd Rr 0-31 0-31 Z,N,V,S 1 1 Rd = Rd xor Rr
1001 010d dddd 0000 COM Rd 0-31 Z,C,N,V,S 1 1 Rd = 0xFF - Rd
1001 010d dddd 0001 NEG Rd 0-31 Z,C,N,V,S,H 1 1 Rd = 0x00 - Rd
0110 KKKK dddd KKKK SBR Rd K 16-31 0-255 Z,N,V,S 1 1 Rd = Rd | K ORI Rd, K
0111 FF-K dddd FF-K CBR Rd K 16-31 0-255 Z,N,V,S 1 1 Rd = Rd & (0xFF - K) ANDI Rd, (0xFF - K)
1001 010d dddd 0011 INC Rd 0-31 Z,N,V,S 1 1 Rd = Rd + 1
1001 010d dddd 1010 DEC Rd 0-31 Z,N,V,S 1 1 Rd = Rd - 1
0010 00Dd DDDD dddd TST Rd 0-31 Z,N,V,S 1 1 Rd = Rd & Rr AND Rd. Rd
0010 01dd dddd dddd CLR Rd 0-31 Z,N,V,S 1 1 Rd = Rd xor Rr EOR Rd, Rd
1110 1111 dddd 1111 SER Rd 16-31 1 1 Rd = 0xFF LDI Rd, K
1001 11rd dddd rrrr MUL Rd Rr 0-31 0-31 Z,C 1 2 R1:R0 = Rd x Rr (UU) V2E
0000 0010 dddd rrrr MULS Rd Rr 16-31 16-31 Z,C 1 2 R1:R0 = Rd x Rr (SS) V2E
0000 0011 0ddd 0rrr MULSU Rd Rr 16-23 16-23 Z,C 1 2 R1:R0 = Rd x Rr (SU) V2E
0000 0011 0ddd 1rrr FMUL Rd Rr 16-23 16-23 Z,C 1 2 R1:R0 = (Rd x Rr) << 1 (UU) V2E
0000 0011 1ddd 0rrr FMULS Rd Rr 16-23 16-23 Z,C 1 2 R1:R0 = (Rd x Rr) << 1 (SS) V2E
0000 0011 1ddd 1rrr FMULSU Rd Rr 16-23 16-23 Z,C 1 2 R1:R0 = (Rd x Rr) << 1 (SU) V2E
Branch instructions
1100 kkkk kkkk kkkk RJMP k -2048...+2048 1 2
1001 0100 0000 1001 IJMP 1 2 V1
1001 0100 0001 1001 EIJMP 1 2 V3
1001 010k kkkk 110k JMP k 0-4194304 2 3 V2E (>=16K)
kkkk kkkk kkkk kkkk (32 bit opcode)
1101 kkkk kkkk kkkk RCALL k -2048...+2048 1 3-4
1001 0101 0000 1001 ICALL 1 3-4 V1
1001 0101 0001 1001 EICALL 1 4 V3
1001 010k kkkk 111k CALL k 0-4194304 2 4-5 V2E (>=16K)
kkkk kkkk kkkk kkkk (32 bit opcode)
1001 0101 0000 1000 RET 1 4-5
1001 0101 0001 1000 RETI I 1 4-5
0001 00rd dddd rrrr CPSE Rd Rr 0-31 0-31 1 1-3
0001 01rd dddd rrrr CP Rd Rr 0-31 0-31 Z,C,N,V,S,H 1 1 Rd - Rr
0000 01rd dddd rrrr CPC Rd Rr 0-31 0-31 Z,C,N,V,S,H 1 1 Rd - Rr - C
0011 KKKK dddd KKKK CPI Rd K 16-31 0-255 Z,C,N,V,S,H 1 1 Rd - K
1111 110r rrrr 0bbb SBRC Rr b 0-31 0-7 1 1-3
1111 111r rrrr 0bbb SBRS Rr b 0-31 0-7 1 1-3
1001 1001 AAAA Abbb SBIC A b 0-31 0-7 1 1-3
1001 1011 AAAA Abbb SBIS A b 0-31 0-7 1 1-3
1111 00kk kkkk ksss BRBS s k 0-7 -64...+63 1 1-2
1111 01kk kkkk ksss BRBC s k 0-7 -64...+63 1 1-2
1111 00kk kkkk k001 BREQ k -64...+63 1 1-2 BRBS 1, k
1111 01kk kkkk k001 BRNE k -64...+63 1 1-2 BRBC 1, k
1111 00kk kkkk k000 BRCS k -64...+63 1 1-2 BRBS 0, k
1111 01kk kkkk k000 BRCC k -64...+63 1 1-2 BRBC 0, k
1111 01kk kkkk k000 BRSH k -64...+63 1 1-2 BRBC 0, k
1111 00kk kkkk k000 BRLO k -64...+63 1 1-2 BRBS 0, k
1111 00kk kkkk k010 BRMI k -64...+63 1 1-2 BRBS 2, k
1111 01kk kkkk k010 BRPL k -64...+63 1 1-2 BRBC 2, k
1111 01kk kkkk k100 BRGE k -64...+63 1 1-2 BRBC 4, k
1111 00kk kkkk k100 BRLT k -64...+63 1 1-2 BRBS 4, k
1111 00kk kkkk k101 BRHS k -64...+63 1 1-2 BRBS 5, k
1111 01kk kkkk k101 BRHC k -64...+63 1 1-2 BRBC 5, k
1111 00kk kkkk k110 BRTS k -64...+63 1 1-2 BRBS 6, k
1111 01kk kkkk k110 BRTC k -64...+63 1 1-2 BRBC 6, k
1111 00kk kkkk k011 BRVS k -64...+63 1 1-2 BRBS 3, k
1111 01kk kkkk k011 BRVC k -64...+63 1 1-2 BRBC 3, k
1111 00kk kkkk k111 BRIE k -64...+63 1 1-2 BRBS 7, k
1111 01kk kkkk k111 BRID k -64...+63 1 1-2 BRBC 7, k
Data transfer
0010 11rd dddd rrrr MOV Rd Rr 0-31 0-31 1 1
0000 0001 dddd rrrr MOVW Rd Rr 0,2,4...28,30 0,2,4...28,30 1 1 V2E
1110 KKKK dddd KKKK LDI Rd K 16-31 0-255 1 1
1001 000d dddd 0000 LDS Rd k 0-31 0-65535 2 2 V1
kkkk kkkk kkkk kkkk (32 bit opcode)
1001 000d dddd 1100 LD Rd X 0-31 1 2 V1
1001 000d dddd 1101 LD Rd X+ 0-31 1 2 V1
1001 000d dddd 1110 LD Rd -X 0-31 1 2 V1
1000 000d dddd 1000 LD Rd Y 0-31 1 2 V1
1001 000d dddd 1001 LD Rd Y+ 0-31 1 2 V1
1001 000d dddd 1010 LD Rd -Y 0-31 1 2 V1
10q0 qq0d dddd 1qqq LDD Rd Y+q 0-31 0-63 1 2 V1
1000 000d dddd 0000 LD Rd Z 0-31 1 2 V0E
1001 000d dddd 0001 LD Rd Z+ 0-31 1 2 V1
1001 000d dddd 0010 LD Rd -Z 0-31 1 2 V1
10q0 qq0d dddd 0qqq LDD Rd Z+q 0-31 0-63 1 2 V1
1001 001r rrrr 0000 STS k Rr 0-65535 0-31 2 2 V1
kkkk kkkk kkkk kkkk (32 bit opcode)
1001 001r rrrr 1100 ST X Rr 0-31 1 2 V1
1001 001r rrrr 1101 ST X+ Rr 0-31 1 2 V1
1001 001r rrrr 1110 ST -X Rr 0-31 1 2 V1
1000 001r rrrr 1000 ST Y Rr 0-31 1 2 V1
1001 001r rrrr 1001 ST Y+ Rr 0-31 1 2 V1
1001 001r rrrr 1010 ST -Y Rr 0-31 1 2 V1
10q0 qq1r rrrr 1qqq STD Y+q Rr 0-63 0-31 1 2 V1
1000 001r rrrr 0000 ST Z Rr 0-31 1 2 V0E
1001 001r rrrr 0001 ST Z+ Rr 0-31 1 2 V1
1001 001r rrrr 0010 ST -Z Rr 0-31 1 2 V1
10q0 qq1r rrrr 0qqq STD Z+q Rr 0-63 0-31 1 2 V1
1001 0101 1100 1000 LPM 1 3 (V0E) LPM 0, Z
1001 000d dddd 0100 LPM Rd Z 0-31 1 3 V1
1001 000d dddd 0101 LPM Rd Z+ 0-31 1 3 V2E
1001 0101 1101 1000 ELPM 1 3 V3 ELPM 0, Z
1001 000d dddd 0110 ELPM Rd Z 0-31 1 3 V3
1001 000d dddd 0111 ELPM Rd Z+ 0-31 1 3 V3
1001 0101 1110 1000 SPM 1 V2
1011 0AAd dddd AAAA IN Rd A 0-31 0-63 1 1
1011 1AAr rrrr AAAA OUT A Rr 0-63 0-31 1 1
1001 001r rrrr 1111 PUSH Rr 0-31 1 2 V1
1001 000d dddd 1111 POP Rd 0-31 1 2 V1
Bit manipulation and bit test
0000 11dD DDDD dddd LSL Rd 0-31 1 1 ADD Rd, Rd
1001 010d dddd 0110 LSR Rd 0-31 1 1
0001 11dD DDDD dddd ROL Rd 0-31 1 1 ADC Rd, Rd
1001 010d dddd 0111 ROR Rd 0-31 1 1
1001 010d dddd 0101 ASR Rd 0-31 1 1
1001 010d dddd 0010 SWAP Rd 0-31 1 1
1001 0100 0sss 1000 BSET s 0-7 1 1
1001 0100 1sss 1000 BCLR s 0-7 1 1
1001 1010 AAAA Abbb SBI A b 0-31 0-7 1 2
1001 1000 AAAA Abbb CBI A b 0-31 0-7 1 2
1111 101r rrrr 0bbb BST Rr b 0-31 0-7 1 1
1111 100d dddd 0bbb BLD Rd b 0-31 0-7 1 1
1001 0100 0000 1000 SEC 1 1 BSET 0
1001 0100 1000 1000 CLC 1 1 BCLR 0
1001 0100 0010 1000 SEN 1 1 BSET 2
1001 0100 1010 1000 CLN 1 1 BCLR 2
1001 0100 0001 1000 SEZ 1 1 BSET 1
1001 0100 1001 1000 CLZ 1 1 BCLR 1
1001 0100 0111 1000 SEI 1 1 BSET 7
1001 0100 1111 1000 CLI 1 1 BCLR 7
1001 0100 0100 1000 SES 1 1 BSET 4
1001 0100 1100 1000 CLS 1 1 BCLR 4
1001 0100 0011 1000 SEV 1 1 BSET 3
1001 0100 1011 1000 CLV 1 1 BCLR 3
1001 0100 0110 1000 SET 1 1 BSET 6
1001 0100 1110 1000 CLT 1 1 BCLR 6
1001 0100 0101 1000 SEH 1 1 BSET 5
1001 0100 1101 1000 CLH 1 1 BCLR 5
MCU control
1001 0101 1001 1000 BREAK 1 1
0000 0000 0000 0000 NOP 1 1
1001 0101 1000 1000 SLEEP 1 1
1001 0101 1010 1000 WDR 1 1
AVR instruction set overview
Opcode Mnemonics Operands Operand range Flags Words Cycles Operation Core version Emulated as Description and notes
0001 11rd dddd rrrr ADC Rd Rr 0-31 0-31 Z,C,N,V,S,H 1 1 Rd = Rd + Rr + C 1 1
0000 11rd dddd rrrr ADD Rd Rr 0-31 0-31 Z,C,N,V,S,H 1 1 Rd = Rd + Rr V0 2 2
1001 0110 KKdd KKKK ADIW Rd K 24,26,28,30 0-63 Z,C,N,V,S 1 2 Rd+1:Rd = Rd+1:Rd + K V1 3
0010 00rd dddd rrrr AND Rd Rr 0-31 0-31 Z,N,V,S 1 1 Rd = Rd & Rr 4 3
0111 KKKK dddd KKKK ANDI Rd K 16-31 0-255 Z,N,V,S 1 1 Rd = Rd & K 5 4
1001 010d dddd 0101 ASR Rd 0-31 1 1 6 5
1001 0100 1sss 1000 BCLR s 0-7 1 1 7 6
1111 100d dddd 0bbb BLD Rd b 0-31 0-7 1 1 8 7
1111 01kk kkkk ksss BRBC s k 0-7 -64...+63 1 1-2 9 8
1111 00kk kkkk ksss BRBS s k 0-7 -64...+63 1 1-2 10 9
1001 0101 1001 1000 BREAK 1 1 11 10
1001 0100 0sss 1000 BSET s 0-7 1 1 12 11
1111 101r rrrr 0bbb BST Rr b 0-31 0-7 1 1 13 12
1001 010k kkkk 111k kk... CALL k 0-4194304 2 4-5 V2E (>=16K) 14
1001 1000 AAAA Abbb CBI A b 0-31 0-7 1 2 15 13
1001 010d dddd 0000 COM Rd 0-31 Z,C,N,V,S 1 1 Rd = 0xFF - Rd 16 14
0001 01rd dddd rrrr CP Rd Rr 0-31 0-31 Z,C,N,V,S,H 1 1 Rd - Rr 17 15
0000 01rd dddd rrrr CPC Rd Rr 0-31 0-31 Z,C,N,V,S,H 1 1 Rd - Rr - C 18 16
0011 KKKK dddd KKKK CPI Rd K 16-31 0-255 Z,C,N,V,S,H 1 1 Rd - K 19 17
0001 00rd dddd rrrr CPSE Rd Rr 0-31 0-31 1 1-3 20 18
1001 010d dddd 1010 DEC Rd 0-31 Z,N,V,S 1 1 Rd = Rd - 1 21 19
1001 0101 0001 1001 EICALL 1 4 V3 22
1001 0100 0001 1001 EIJMP 1 2 V3 23
1001 000d dddd 0110 ELPM Rd Z 0-31 1 3 V3 24
1001 000d dddd 0111 ELPM Rd Z+ 0-31 1 3 V3 25
0010 01rd dddd rrrr EOR Rd Rr 0-31 0-31 Z,N,V,S 1 1 Rd = Rd xor Rr 26 20
0000 0011 0ddd 1rrr FMUL Rd Rr 16-23 16-23 Z,C 1 2 R1:R0 = (Rd x Rr) << 1 (UU) V2E 27
0000 0011 1ddd 0rrr FMULS Rd Rr 16-23 16-23 Z,C 1 2 R1:R0 = (Rd x Rr) << 1 (SS) V2E 28
0000 0011 1ddd 1rrr FMULSU Rd Rr 16-23 16-23 Z,C 1 2 R1:R0 = (Rd x Rr) << 1 (SU) V2E 29
1001 0101 0000 1001 ICALL 1 3-4 V1 30
1001 0100 0000 1001 IJMP 1 2 V1 31
1011 0AAd dddd AAAA IN Rd A 0-31 0-63 1 1 32 21
1001 010d dddd 0011 INC Rd 0-31 Z,N,V,S 1 1 Rd = Rd + 1 33 22
1001 010k kkkk 110k kk... JMP k 0-4194304 2 3 V2E (>=16K) 34
1001 000d dddd 0001 LD Rd Z+ 0-31 1 2 V1 35
1001 000d dddd 0010 LD Rd -Z 0-31 1 2 V1 36
1001 000d dddd 1001 LD Rd Y+ 0-31 1 2 V1 37
1001 000d dddd 1010 LD Rd -Y 0-31 1 2 V1 38
1001 000d dddd 1100 LD Rd X 0-31 1 2 V1 39
1001 000d dddd 1101 LD Rd X+ 0-31 1 2 V1 40
1001 000d dddd 1110 LD Rd -X 0-31 1 2 V1 41
10q0 qq0d dddd 0qqq LDD Rd Z+q 0-31 0-63 1 2 V1 42
10q0 qq0d dddd 1qqq LDD Rd Y+q 0-31 0-63 1 2 V1 43
1110 KKKK dddd KKKK LDI Rd K 16-31 0-255 1 1 44 23
1001 000d dddd 0000 kk... LDS Rd k 0-31 0-65535 2 2 V1 45
1001 000d dddd 0100 LPM Rd Z 0-31 1 3 V1 46
1001 000d dddd 0101 LPM Rd Z+ 0-31 1 3 V2E 47
1001 010d dddd 0110 LSR Rd 0-31 1 1 48 24
0010 11rd dddd rrrr MOV Rd Rr 0-31 0-31 1 1 49 25
0000 0001 dddd rrrr MOVW Rd Rr 0,2,4...28,30 0,2,4...28,30 1 1 V2E 50
1001 11rd dddd rrrr MUL Rd Rr 0-31 0-31 Z,C 1 2 R1:R0 = Rd x Rr (UU) V2E 51
0000 0010 dddd rrrr MULS Rd Rr 16-31 16-31 Z,C 1 2 R1:R0 = Rd x Rr (SS) V2E 52
0000 0011 0ddd 0rrr MULSU Rd Rr 16-23 16-23 Z,C 1 2 R1:R0 = Rd x Rr (SU) V2E 53
1001 010d dddd 0001 NEG Rd 0-31 Z,C,N,V,S,H 1 1 Rd = 0x00 - Rd 54 26
0000 0000 0000 0000 NOP 1 1 55 27
0010 10rd dddd rrrr OR Rd Rr 0-31 0-31 Z,N,V,S 1 1 Rd = Rd | Rr 56 28
0110 KKKK dddd KKKK ORI Rd K 16-31 0-255 Z,N,V,S 1 1 Rd = Rd | K 57 29
1011 1AAr rrrr AAAA OUT A Rr 0-63 0-31 1 1 58 30
1001 000d dddd 1111 POP Rd 0-31 1 2 V1 59
1001 001r rrrr 1111 PUSH Rr 0-31 1 2 V1 60
1101 kkkk kkkk kkkk RCALL k -2048...+2048 1 3-4 61 31
1001 0101 0000 1000 RET 1 4-5 62 32
1001 0101 0001 1000 RETI I 1 4-5 63 33
1100 kkkk kkkk kkkk RJMP k -2048...+2048 1 2 64 34
1001 010d dddd 0111 ROR Rd 0-31 1 1 65 35
0000 10rd dddd rrrr SBC Rd Rr 0-31 0-31 Z,C,N,V,S,H 1 1 Rd = Rd - Rr - C 66 36
0100 KKKK dddd KKKK SBCI Rd K 16-31 0-255 Z,C,N,V,S,H 1 1 Rd = Rd - K - C 67 37
1001 1010 AAAA Abbb SBI A b 0-31 0-7 1 2 68 38
1001 1001 AAAA Abbb SBIC A b 0-31 0-7 1 1-3 69 39
1001 1011 AAAA Abbb SBIS A b 0-31 0-7 1 1-3 70 40
1001 0111 KKdd KKKK SBIW Rd K 24,26,28,30 0-63 Z,C,N,V,S 1 2 Rd+1:Rd = Rd+1:Rd - K V1 71
1111 110r rrrr 0bbb SBRC Rr b 0-31 0-7 1 1-3 72 41
1111 111r rrrr 0bbb SBRS Rr b 0-31 0-7 1 1-3 73 42
1001 0101 1000 1000 SLEEP 1 1 74 43
1001 0101 1110 1000 SPM 1 V2 75
1001 001r rrrr 0001 ST Z+ Rr 0-31 1 2 V1 76
1001 001r rrrr 0010 ST -Z Rr 0-31 1 2 V1 77
1001 001r rrrr 1001 ST Y+ Rr 0-31 1 2 V1 78
1001 001r rrrr 1010 ST -Y Rr 0-31 1 2 V1 79
1001 001r rrrr 1100 ST X Rr 0-31 1 2 V1 80
1001 001r rrrr 1101 ST X+ Rr 0-31 1 2 V1 81
1001 001r rrrr 1110 ST -X Rr 0-31 1 2 V1 82
10q0 qq1r rrrr 0qqq STD Z+q Rr 0-63 0-31 1 2 V1 83
10q0 qq1r rrrr 1qqq STD Y+q Rr 0-63 0-31 1 2 V1 84
1001 001r rrrr 0000 kk... STS k Rr 0-65535 0-31 2 2 V1 85
0001 10rd dddd rrrr SUB Rd Rr 0-31 0-31 Z,C,N,V,S,H 1 1 Rd = Rd - Rr 86 44
0101 KKKK dddd KKKK SUBI Rd K 16-31 0-255 Z,C,N,V,S,H 1 1 Rd = Rd - K 87 45
1001 010d dddd 0010 SWAP Rd 0-31 1 1 88 46
1001 0101 1010 1000 WDR 1 1 89 47
(V0E 47+3=50)
AVR instruction set overview
Opcode Mnemonics Operands Operand range Flags Words Cycles Operation Core version Emulated as Description and notes
0001 11rd dddd rrrr ADC Rd Rr 0-31 0-31 Z,C,N,V,S,H 1 1 Rd = Rd + Rr + C 1 1
0000 11rd dddd rrrr ADD Rd Rr 0-31 0-31 Z,C,N,V,S,H 1 1 Rd = Rd + Rr V0 2 2
1001 0110 KKdd KKKK ADIW Rd K 24,26,28,30 0-63 Z,C,N,V,S 1 2 Rd+1:Rd = Rd+1:Rd + K V1 3
0010 00rd dddd rrrr AND Rd Rr 0-31 0-31 Z,N,V,S 1 1 Rd = Rd & Rr 4 3
0111 KKKK dddd KKKK ANDI Rd K 16-31 0-255 Z,N,V,S 1 1 Rd = Rd & K 5 4
1001 010d dddd 0101 ASR Rd 0-31 1 1 6 5
1001 0100 1sss 1000 BCLR s 0-7 1 1 7 6
1111 100d dddd 0bbb BLD Rd b 0-31 0-7 1 1 8 7
1111 01kk kkkk ksss BRBC s k 0-7 -64...+63 1 1-2 9 8
1111 00kk kkkk ksss BRBS s k 0-7 -64...+63 1 1-2 10 9
1001 0101 1001 1000 BREAK 1 1 11 10
1001 0100 0sss 1000 BSET s 0-7 1 1 12 11
1111 101r rrrr 0bbb BST Rr b 0-31 0-7 1 1 13 12
1001 010k kkkk 111k kk... CALL k 0-4194304 2 4-5 V2E (>=16K) 14
1001 1000 AAAA Abbb CBI A b 0-31 0-7 1 2 15 13
1001 010d dddd 0000 COM Rd 0-31 Z,C,N,V,S 1 1 Rd = 0xFF - Rd 16 14
0001 01rd dddd rrrr CP Rd Rr 0-31 0-31 Z,C,N,V,S,H 1 1 Rd - Rr 17 15
0000 01rd dddd rrrr CPC Rd Rr 0-31 0-31 Z,C,N,V,S,H 1 1 Rd - Rr - C 18 16
0011 KKKK dddd KKKK CPI Rd K 16-31 0-255 Z,C,N,V,S,H 1 1 Rd - K 19 17
0001 00rd dddd rrrr CPSE Rd Rr 0-31 0-31 1 1-3 20 18
1001 010d dddd 1010 DEC Rd 0-31 Z,N,V,S 1 1 Rd = Rd - 1 21 19
1001 0101 0001 1001 EICALL 1 4 V3 22
1001 0100 0001 1001 EIJMP 1 2 V3 23
1001 000d dddd 0111 ELPM Rd Z/Z+ 0-31 1 3 V3 24
0010 01rd dddd rrrr EOR Rd Rr 0-31 0-31 Z,N,V,S 1 1 Rd = Rd xor Rr 25 20
0000 0011 0ddd 1rrr FMUL Rd Rr 16-23 16-23 Z,C 1 2 R1:R0 = (Rd x Rr) << 1 (UU) V2E 26
0000 0011 1ddd 0rrr FMULS Rd Rr 16-23 16-23 Z,C 1 2 R1:R0 = (Rd x Rr) << 1 (SS) V2E 27
0000 0011 1ddd 1rrr FMULSU Rd Rr 16-23 16-23 Z,C 1 2 R1:R0 = (Rd x Rr) << 1 (SU) V2E 28
1001 0101 0000 1001 ICALL 1 3-4 V1 29
1001 0100 0000 1001 IJMP 1 2 V1 30
1011 0AAd dddd AAAA IN Rd A 0-31 0-63 1 1 31 21
1001 010d dddd 0011 INC Rd 0-31 Z,N,V,S 1 1 Rd = Rd + 1 32 22
1001 010k kkkk 110k kk... JMP k 0-4194304 2 3 V2E (>=16K) 33
1001 000d dddd 0001 LD Rd -Z+/-Y+/-X+ 0-31 1 2 V1 34
10q0 qq0d dddd 0qqq LDD Rd Z+q/Y+q 0-31 0-63 1 2 V1 35
1110 KKKK dddd KKKK LDI Rd K 16-31 0-255 1 1 36 23
1001 000d dddd 0000 kk... LDS Rd k 0-31 0-65535 2 2 V1 37
1001 000d dddd 0101 LPM Rd Z/Z+ 0-31 1 3 V2E 38
1001 010d dddd 0110 LSR Rd 0-31 1 1 39 24
0010 11rd dddd rrrr MOV Rd Rr 0-31 0-31 1 1 40 25
0000 0001 dddd rrrr MOVW Rd Rr 0,2,4...28,30 0,2,4...28,30 1 1 V2E 41
1001 11rd dddd rrrr MUL Rd Rr 0-31 0-31 Z,C 1 2 R1:R0 = Rd x Rr (UU) V2E 42
0000 0010 dddd rrrr MULS Rd Rr 16-31 16-31 Z,C 1 2 R1:R0 = Rd x Rr (SS) V2E 43
0000 0011 0ddd 0rrr MULSU Rd Rr 16-23 16-23 Z,C 1 2 R1:R0 = Rd x Rr (SU) V2E 44
1001 010d dddd 0001 NEG Rd 0-31 Z,C,N,V,S,H 1 1 Rd = 0x00 - Rd 45 26
0000 0000 0000 0000 NOP 1 1 46 27
0010 10rd dddd rrrr OR Rd Rr 0-31 0-31 Z,N,V,S 1 1 Rd = Rd | Rr 47 28
0110 KKKK dddd KKKK ORI Rd K 16-31 0-255 Z,N,V,S 1 1 Rd = Rd | K 48 29
1011 1AAr rrrr AAAA OUT A Rr 0-63 0-31 1 1 49 30
1001 000d dddd 1111 POP Rd 0-31 1 2 V1 50
1001 001r rrrr 1111 PUSH Rr 0-31 1 2 V1 51
1101 kkkk kkkk kkkk RCALL k -2048...+2048 1 3-4 52 31
1001 0101 0000 1000 RET 1 4-5 53 32
1001 0101 0001 1000 RETI I 1 4-5 54 33
1100 kkkk kkkk kkkk RJMP k -2048...+2048 1 2 55 34
1001 010d dddd 0111 ROR Rd 0-31 1 1 56 35
0000 10rd dddd rrrr SBC Rd Rr 0-31 0-31 Z,C,N,V,S,H 1 1 Rd = Rd - Rr - C 57 36
0100 KKKK dddd KKKK SBCI Rd K 16-31 0-255 Z,C,N,V,S,H 1 1 Rd = Rd - K - C 58 37
1001 1010 AAAA Abbb SBI A b 0-31 0-7 1 2 59 38
1001 1001 AAAA Abbb SBIC A b 0-31 0-7 1 1-3 60 39
1001 1011 AAAA Abbb SBIS A b 0-31 0-7 1 1-3 61 40
1001 0111 KKdd KKKK SBIW Rd K 24,26,28,30 0-63 Z,C,N,V,S 1 2 Rd+1:Rd = Rd+1:Rd - K V1 62
1111 110r rrrr 0bbb SBRC Rr b 0-31 0-7 1 1-3 63 41
1111 111r rrrr 0bbb SBRS Rr b 0-31 0-7 1 1-3 64 42
1001 0101 1000 1000 SLEEP 1 1 65 43
1001 0101 1110 1000 SPM 1 V2 66
1001 001r rrrr 0001 ST -Z+/-Y+/-X+ Rr 0-31 1 2 V1 67
10q0 qq1r rrrr 0qqq STD Z+q/Y+q Rr 0-63 0-31 1 2 V1 68
1001 001r rrrr 0000 kk... STS k Rr 0-65535 0-31 2 2 V1 69
0001 10rd dddd rrrr SUB Rd Rr 0-31 0-31 Z,C,N,V,S,H 1 1 Rd = Rd - Rr 70 44
0101 KKKK dddd KKKK SUBI Rd K 16-31 0-255 Z,C,N,V,S,H 1 1 Rd = Rd - K 71 45
1001 010d dddd 0010 SWAP Rd 0-31 1 1 72 46
1001 0101 1010 1000 WDR 1 1 73 47
(V0E 47+3=50)

Sheet2
AVR asm free opcodes: Combinations Notes
1001 00xd dddd x011 4*32 Load and store data
1001 00xd dddd 1000 2*32 Load and store data
1001 001r rrrr 01xx 4*32 Store data *
1001 010d dddd 0100 32 One register aritmetic/logic (logic shifts)
1001 010d dddd 1011 32
1001 010x 1xxx 1001 16 Jumps, calls, ...
1001 010x x1xx 1001 16
1001 010x xx1x 1001 16
1001 0101 001x 1000 2 MCU control and other
1001 0101 01xx 1000 4
1001 0101 1011 1000 1
1001 0101 1111 1000 1
1111 100d dddd 1bbb * Complements to LPM/ELPM:
1111 101r rrrr 1bbb SPM Z, Rr
1111 110r rrrr 1bbb SPM Z+, Rr
1111 111r rrrr 1bbb ESPM Z, Rr
ESPM Z+, Rr
1000 000d dddd 0000 LD Rd Z
1000 000d dddd 1000 LD Rd Y
10q0 qq0d dddd 0qqq LDD Rd Z+q
10q0 qq0d dddd 1qqq LDD Rd Y+q
1000 000d dddd 0000 LD Rd Z
1001 000d dddd 0001 LD Rd Z+
1001 000d dddd 0010 LD Rd -Z
1000 000d dddd 1000 LD Rd Y
1001 000d dddd 1001 LD Rd Y+
1001 000d dddd 1010 LD Rd -Y
1001 000d dddd 1100 LD Rd X
1001 000d dddd 1101 LD Rd X+
1001 000d dddd 1110 LD Rd -X
1xx1 xx0d dddd 1100
1000 001r rrrr 0000 ST Z Rr
1001 001r rrrr 0001 ST Z+ Rr
1001 001r rrrr 0010 ST -Z Rr
1000 001r rrrr 1000 ST Y Rr
1001 001r rrrr 1001 ST Y+ Rr
1001 001r rrrr 1010 ST -Y Rr
1001 001r rrrr 1100 ST X Rr
1001 001r rrrr 1101 ST X+ Rr
1001 001r rrrr 1110 ST -X Rr
10q0 qq1r rrrr 0qqq STD Z+q Rr
10q0 qq1r rrrr 1qqq STD Y+q Rr
1000 001r rrrr 0000 ST Z Rr
1000 001r rrrr 1000 ST Y Rr
1001 0100 0000 1001 IJMP 1 2 V1
1001 0100 0001 1001 EIJMP 1 2 V3
1001 0100 0sss 1000 BSET s 0-7 1 1
1001 0100 1sss 1000 BCLR s 0-7 1 1
1001 0101 0000 1000 RET 1 4-5
1001 0101 0000 1001 ICALL 1 3-4 V1
1001 0101 0001 1000 RETI I 1 4-5
1001 0101 0001 1001 EICALL 1 4 V3
1001 0101 1000 1000 SLEEP 1 1
1001 0101 1001 1000 BREAK 1 1
1001 0101 1010 1000 WDR 1 1
1001 0101 1100 1000 LPM 1 3 (V0E) LPM 0, Z
1001 0101 1101 1000 ELPM 1 3 V3 ELPM 0, Z
1001 0101 1110 1000 SPM 1 V2
free:
1001 010d dddd 0100 0101 001x 1000 1xxx 1001
1001 010d dddd 1011 01xx x1xx
1001 010x 1xxx 1001 1011 xx1x
1001 010x x1xx 1001 1111
1001 010x xx1x 1001
1001 0101 001x 1000
1001 0101 01xx 1000
1001 0101 1011 1000
1001 0101 1111 1000
1001 001r rrrr 0000 kk... STS k Rr 0-65535 0-31 2 2 V1
1001 001r rrrr 0001 ST Z+ Rr 0-31 1 2 V1
1001 001r rrrr 0010 ST -Z Rr 0-31 1 2 V1
1001 001r rrrr 1001 ST Y+ Rr 0-31 1 2 V1
1001 001r rrrr 1010 ST -Y Rr 0-31 1 2 V1
1001 001r rrrr 1100 ST X Rr 0-31 1 2 V1
1001 001r rrrr 1101 ST X+ Rr 0-31 1 2 V1
1001 001r rrrr 1110 ST -X Rr 0-31 1 2 V1
1001 001r rrrr 1111 PUSH Rr 0-31 1 2 V1
free:
1001 001r rrrr 0011
1001 001r rrrr 01xx alternativa k LPM, ELPM
1001 001r rrrr 1000
1001 001r rrrr 1011
1001 000d dddd 0000 kk... LDS Rd k 0-31 0-65535 2 2 V1
1001 000d dddd 0001 LD Rd Z+ 0-31 1 2 V1
1001 000d dddd 0010 LD Rd -Z 0-31 1 2 V1
1001 000d dddd 0100 LPM Rd Z 0-31 1 3 V1
1001 000d dddd 0101 LPM Rd Z+ 0-31 1 3 V2E
1001 000d dddd 0110 ELPM Rd Z 0-31 1 3 V3
1001 000d dddd 0111 ELPM Rd Z+ 0-31 1 3 V3
1001 000d dddd 1001 LD Rd Y+ 0-31 1 2 V1
1001 000d dddd 1010 LD Rd -Y 0-31 1 2 V1
1001 000d dddd 1100 LD Rd X 0-31 1 2 V1
1001 000d dddd 1101 LD Rd X+ 0-31 1 2 V1
1001 000d dddd 1110 LD Rd -X 0-31 1 2 V1
1001 000d dddd 1111 POP Rd 0-31 1 2 V1
free:
1001 000d dddd 0011
1001 000d dddd 1000
1001 000d dddd 1011
AVR instruction set overview
Opcode Mnemonics Operands Operand range Flags Words Cycles Operation Core version Emulated as Description and notes
0000 0000 0000 0000 NOP 1 1
0000 0001 dddd rrrr MOVW Rd Rr 0,2,4...28,30 0,2,4...28,30 1 1 V2E
0000 0010 dddd rrrr MULS Rd Rr 16-31 16-31 Z,C 1 2 R1:R0 = Rd x Rr (SS) V2E
0000 0011 0ddd 0rrr MULSU Rd Rr 16-23 16-23 Z,C 1 2 R1:R0 = Rd x Rr (SU) V2E
0000 0011 0ddd 1rrr FMUL Rd Rr 16-23 16-23 Z,C 1 2 R1:R0 = (Rd x Rr) << 1 (UU) V2E
0000 0011 1ddd 0rrr FMULS Rd Rr 16-23 16-23 Z,C 1 2 R1:R0 = (Rd x Rr) << 1 (SS) V2E
0000 0011 1ddd 1rrr FMULSU Rd Rr 16-23 16-23 Z,C 1 2 R1:R0 = (Rd x Rr) << 1 (SU) V2E
0000 01rd dddd rrrr CPC Rd Rr 0-31 0-31 Z,C,N,V,S,H 1 1 Rd - Rr - C
0000 10rd dddd rrrr SBC Rd Rr 0-31 0-31 Z,C,N,V,S,H 1 1 Rd = Rd - Rr - C
0000 11rd dddd rrrr ADD Rd Rr 0-31 0-31 Z,C,N,V,S,H 1 1 Rd = Rd + Rr V0
0001 00rd dddd rrrr CPSE Rd Rr 0-31 0-31 1 1-3
0001 01rd dddd rrrr CP Rd Rr 0-31 0-31 Z,C,N,V,S,H 1 1 Rd - Rr
0001 10rd dddd rrrr SUB Rd Rr 0-31 0-31 Z,C,N,V,S,H 1 1 Rd = Rd - Rr
0001 11rd dddd rrrr ADC Rd Rr 0-31 0-31 Z,C,N,V,S,H 1 1 Rd = Rd + Rr + C
0010 00rd dddd rrrr AND Rd Rr 0-31 0-31 Z,N,V,S 1 1 Rd = Rd & Rr
0010 01rd dddd rrrr EOR Rd Rr 0-31 0-31 Z,N,V,S 1 1 Rd = Rd xor Rr
0010 10rd dddd rrrr OR Rd Rr 0-31 0-31 Z,N,V,S 1 1 Rd = Rd | Rr
0010 11rd dddd rrrr MOV Rd Rr 0-31 0-31 1 1
0011 KKKK dddd KKKK CPI Rd K 16-31 0-255 Z,C,N,V,S,H 1 1 Rd - K
0100 KKKK dddd KKKK SBCI Rd K 16-31 0-255 Z,C,N,V,S,H 1 1 Rd = Rd - K - C
0101 KKKK dddd KKKK SUBI Rd K 16-31 0-255 Z,C,N,V,S,H 1 1 Rd = Rd - K
0110 KKKK dddd KKKK ORI Rd K 16-31 0-255 Z,N,V,S 1 1 Rd = Rd | K
0111 KKKK dddd KKKK ANDI Rd K 16-31 0-255 Z,N,V,S 1 1 Rd = Rd & K
1001 000d dddd 0000 kk... LDS Rd k 0-31 0-65535 2 2 V1
1001 000d dddd 0001 LD Rd Z+ 0-31 1 2 V1
1001 000d dddd 0010 LD Rd -Z 0-31 1 2 V1
1001 000d dddd 0100 LPM Rd Z 0-31 1 3 V1
1001 000d dddd 0101 LPM Rd Z+ 0-31 1 3 V2E
1001 000d dddd 0110 ELPM Rd Z 0-31 1 3 V3
1001 000d dddd 0111 ELPM Rd Z+ 0-31 1 3 V3
1001 000d dddd 1001 LD Rd Y+ 0-31 1 2 V1
1001 000d dddd 1010 LD Rd -Y 0-31 1 2 V1
1001 000d dddd 1100 LD Rd X 0-31 1 2 V1
1001 000d dddd 1101 LD Rd X+ 0-31 1 2 V1
1001 000d dddd 1110 LD Rd -X 0-31 1 2 V1
1001 000d dddd 1111 POP Rd 0-31 1 2 V1
1001 001r rrrr 0000 kk... STS k Rr 0-65535 0-31 2 2 V1
1001 001r rrrr 0001 ST Z+ Rr 0-31 1 2 V1
1001 001r rrrr 0010 ST -Z Rr 0-31 1 2 V1
1001 001r rrrr 1001 ST Y+ Rr 0-31 1 2 V1
1001 001r rrrr 1010 ST -Y Rr 0-31 1 2 V1
1001 001r rrrr 1100 ST X Rr 0-31 1 2 V1
1001 001r rrrr 1101 ST X+ Rr 0-31 1 2 V1
1001 001r rrrr 1110 ST -X Rr 0-31 1 2 V1
1001 001r rrrr 1111 PUSH Rr 0-31 1 2 V1
1001 0100 0000 1001 IJMP 1 2 V1
1001 0100 0001 1001 EIJMP 1 2 V3
1001 0100 0sss 1000 BSET s 0-7 1 1
1001 0100 1sss 1000 BCLR s 0-7 1 1
1001 0101 0000 1000 RET 1 4-5
1001 0101 0000 1001 ICALL 1 3-4 V1
1001 0101 0001 1000 RETI I 1 4-5
1001 0101 0001 1001 EICALL 1 4 V3
1001 0101 1000 1000 SLEEP 1 1
1001 0101 1001 1000 BREAK 1 1
1001 0101 1010 1000 WDR 1 1
1001 0101 1110 1000 SPM 1 V2
1001 010d dddd 0000 COM Rd 0-31 Z,C,N,V,S 1 1 Rd = 0xFF - Rd
1001 010d dddd 0001 NEG Rd 0-31 Z,C,N,V,S,H 1 1 Rd = 0x00 - Rd
1001 010d dddd 0010 SWAP Rd 0-31 1 1
1001 010d dddd 0011 INC Rd 0-31 Z,N,V,S 1 1 Rd = Rd + 1
1001 010d dddd 0101 ASR Rd 0-31 1 1
1001 010d dddd 0110 LSR Rd 0-31 1 1
1001 010d dddd 0111 ROR Rd 0-31 1 1
1001 010d dddd 1010 DEC Rd 0-31 Z,N,V,S 1 1 Rd = Rd - 1
1001 010k kkkk 110k kk... JMP k 0-4194304 2 3 V2E (>=16K)
1001 010k kkkk 111k kk... CALL k 0-4194304 2 4-5 V2E (>=16K)
1001 0110 KKdd KKKK ADIW Rd K 24,26,28,30 0-63 Z,C,N,V,S 1 2 Rd+1:Rd = Rd+1:Rd + K V1
1001 0111 KKdd KKKK SBIW Rd K 24,26,28,30 0-63 Z,C,N,V,S 1 2 Rd+1:Rd = Rd+1:Rd - K V1
1001 1000 AAAA Abbb CBI A b 0-31 0-7 1 2
1001 1001 AAAA Abbb SBIC A b 0-31 0-7 1 1-3
1001 1010 AAAA Abbb SBI A b 0-31 0-7 1 2
1001 1011 AAAA Abbb SBIS A b 0-31 0-7 1 1-3
1001 11rd dddd rrrr MUL Rd Rr 0-31 0-31 Z,C 1 2 R1:R0 = Rd x Rr (UU) V2E
1011 0AAd dddd AAAA IN Rd A 0-31 0-63 1 1
1011 1AAr rrrr AAAA OUT A Rr 0-63 0-31 1 1
10q0 qq0d dddd 0qqq LDD Rd Z+q 0-31 0-63 1 2 V1
10q0 qq0d dddd 1qqq LDD Rd Y+q 0-31 0-63 1 2 V1
10q0 qq1r rrrr 0qqq STD Z+q Rr 0-63 0-31 1 2 V1
10q0 qq1r rrrr 1qqq STD Y+q Rr 0-63 0-31 1 2 V1
1100 kkkk kkkk kkkk RJMP k -2048...+2048 1 2
1101 kkkk kkkk kkkk RCALL k -2048...+2048 1 3-4
1110 KKKK dddd KKKK LDI Rd K 16-31 0-255 1 1
1111 00kk kkkk ksss BRBS s k 0-7 -64...+63 1 1-2
1111 01kk kkkk ksss BRBC s k 0-7 -64...+63 1 1-2
1111 100d dddd 0bbb BLD Rd b 0-31 0-7 1 1
1111 101r rrrr 0bbb BST Rr b 0-31 0-7 1 1
1111 110r rrrr 0bbb SBRC Rr b 0-31 0-7 1 1-3
1111 111r rrrr 0bbb SBRS Rr b 0-31 0-7 1 1-3

Sheet3
AVR instruction set overview
Opcode Mnemonics Operands Operand range Flags Words Cycles Operation Core version Emulated as Description and notes
0000 0000 0000 0000 NOP 1 1
0000 0001 dddd rrrr MOVW Rd Rr 0,2,4...28,30 0,2,4...28,30 1 1 V2E
0000 0010 dddd rrrr MULS Rd Rr 16-31 16-31 Z,C 1 2 R1:R0 = Rd x Rr (SS) V2E
0000 0011 0ddd 0rrr MULSU Rd Rr 16-23 16-23 Z,C 1 2 R1:R0 = Rd x Rr (SU) V2E
0000 0011 0ddd 1rrr FMUL Rd Rr 16-23 16-23 Z,C 1 2 R1:R0 = (Rd x Rr) << 1 (UU) V2E
0000 0011 1ddd 0rrr FMULS Rd Rr 16-23 16-23 Z,C 1 2 R1:R0 = (Rd x Rr) << 1 (SS) V2E
0000 0011 1ddd 1rrr FMULSU Rd Rr 16-23 16-23 Z,C 1 2 R1:R0 = (Rd x Rr) << 1 (SU) V2E
0000 01rd dddd rrrr CPC Rd Rr 0-31 0-31 Z,C,N,V,S,H 1 1 Rd - Rr - C
0000 10rd dddd rrrr SBC Rd Rr 0-31 0-31 Z,C,N,V,S,H 1 1 Rd = Rd - Rr - C
0000 11dD DDDD dddd LSL Rd 0-31 1 1 ADD Rd, Rd
0000 11rd dddd rrrr ADD Rd Rr 0-31 0-31 Z,C,N,V,S,H 1 1 Rd = Rd + Rr V0
0001 00rd dddd rrrr CPSE Rd Rr 0-31 0-31 1 1-3
0001 01rd dddd rrrr CP Rd Rr 0-31 0-31 Z,C,N,V,S,H 1 1 Rd - Rr
0001 10rd dddd rrrr SUB Rd Rr 0-31 0-31 Z,C,N,V,S,H 1 1 Rd = Rd - Rr
0001 11dD DDDD dddd ROL Rd 0-31 1 1 ADC Rd, Rd
0001 11rd dddd rrrr ADC Rd Rr 0-31 0-31 Z,C,N,V,S,H 1 1 Rd = Rd + Rr + C
0010 00Dd DDDD dddd TST Rd 0-31 Z,N,V,S 1 1 Rd = Rd & Rr AND Rd. Rd
0010 00rd dddd rrrr AND Rd Rr 0-31 0-31 Z,N,V,S 1 1 Rd = Rd & Rr
0010 01dd dddd dddd CLR Rd 0-31 Z,N,V,S 1 1 Rd = Rd xor Rr EOR Rd, Rd
0010 01rd dddd rrrr EOR Rd Rr 0-31 0-31 Z,N,V,S 1 1 Rd = Rd xor Rr
0010 10rd dddd rrrr OR Rd Rr 0-31 0-31 Z,N,V,S 1 1 Rd = Rd | Rr
0010 11rd dddd rrrr MOV Rd Rr 0-31 0-31 1 1
0011 KKKK dddd KKKK CPI Rd K 16-31 0-255 Z,C,N,V,S,H 1 1 Rd - K
0100 KKKK dddd KKKK SBCI Rd K 16-31 0-255 Z,C,N,V,S,H 1 1 Rd = Rd - K - C
0101 KKKK dddd KKKK SUBI Rd K 16-31 0-255 Z,C,N,V,S,H 1 1 Rd = Rd - K
0110 KKKK dddd KKKK ORI Rd K 16-31 0-255 Z,N,V,S 1 1 Rd = Rd | K
0110 KKKK dddd KKKK SBR Rd K 16-31 0-255 Z,N,V,S 1 1 Rd = Rd | K ORI Rd, K
0111 FF-K dddd FF-K CBR Rd K 16-31 0-255 Z,N,V,S 1 1 Rd = Rd & (0xFF - K) ANDI Rd, (0xFF - K)
0111 KKKK dddd KKKK ANDI Rd K 16-31 0-255 Z,N,V,S 1 1 Rd = Rd & K
1000 000d dddd 0000 LD Rd Z 0-31 1 2 V0E LDD Rd, Z+0
1000 000d dddd 1000 LD Rd Y 0-31 1 2 V1 LDD Rd, Y+0
1000 001r rrrr 0000 ST Z Rr 0-31 1 2 V0E STD Z+0, Rr
1000 001r rrrr 1000 ST Y Rr 0-31 1 2 V1 STD Y+0, Rr
1001 000d dddd 0000 kk... LDS Rd k 0-31 0-65535 2 2 V1
1001 000d dddd 0001 LD Rd Z+ 0-31 1 2 V1
1001 000d dddd 0010 LD Rd -Z 0-31 1 2 V1
1001 000d dddd 0100 LPM Rd Z 0-31 1 3 V1
1001 000d dddd 0101 LPM Rd Z+ 0-31 1 3 V2E
1001 000d dddd 0110 ELPM Rd Z 0-31 1 3 V3
1001 000d dddd 0111 ELPM Rd Z+ 0-31 1 3 V3
1001 000d dddd 1001 LD Rd Y+ 0-31 1 2 V1
1001 000d dddd 1010 LD Rd -Y 0-31 1 2 V1
1001 000d dddd 1100 LD Rd X 0-31 1 2 V1
1001 000d dddd 1101 LD Rd X+ 0-31 1 2 V1
1001 000d dddd 1110 LD Rd -X 0-31 1 2 V1
1001 000d dddd 1111 POP Rd 0-31 1 2 V1
1001 001r rrrr 0000 kk... STS k Rr 0-65535 0-31 2 2 V1
1001 001r rrrr 0001 ST Z+ Rr 0-31 1 2 V1
1001 001r rrrr 0010 ST -Z Rr 0-31 1 2 V1
1001 001r rrrr 1001 ST Y+ Rr 0-31 1 2 V1
1001 001r rrrr 1010 ST -Y Rr 0-31 1 2 V1
1001 001r rrrr 1100 ST X Rr 0-31 1 2 V1
1001 001r rrrr 1101 ST X+ Rr 0-31 1 2 V1
1001 001r rrrr 1110 ST -X Rr 0-31 1 2 V1
1001 001r rrrr 1111 PUSH Rr 0-31 1 2 V1
1001 0100 0000 1000 SEC 1 1 BSET 0
1001 0100 0000 1001 IJMP 1 2 V1
1001 0100 0001 1000 SEZ 1 1 BSET 1
1001 0100 0001 1001 EIJMP 1 2 V3
1001 0100 0010 1000 SEN 1 1 BSET 2
1001 0100 0011 1000 SEV 1 1 BSET 3
1001 0100 0100 1000 SES 1 1 BSET 4
1001 0100 0101 1000 SEH 1 1 BSET 5
1001 0100 0110 1000 SET 1 1 BSET 6
1001 0100 0111 1000 SEI 1 1 BSET 7
1001 0100 0sss 1000 BSET s 0-7 1 1
1001 0100 1000 1000 CLC 1 1 BCLR 0
1001 0100 1001 1000 CLZ 1 1 BCLR 1
1001 0100 1010 1000 CLN 1 1 BCLR 2
1001 0100 1011 1000 CLV 1 1 BCLR 3
1001 0100 1100 1000 CLS 1 1 BCLR 4
1001 0100 1101 1000 CLH 1 1 BCLR 5
1001 0100 1110 1000 CLT 1 1 BCLR 6
1001 0100 1111 1000 CLI 1 1 BCLR 7
1001 0100 1sss 1000 BCLR s 0-7 1 1
1001 0101 0000 1000 RET 1 4-5
1001 0101 0000 1001 ICALL 1 3-4 V1
1001 0101 0001 1000 RETI I 1 4-5
1001 0101 0001 1001 EICALL 1 4 V3
1001 0101 1000 1000 SLEEP 1 1
1001 0101 1001 1000 BREAK 1 1
1001 0101 1010 1000 WDR 1 1
1001 0101 1100 1000 LPM 1 3 (V0E) LPM 0, Z
1001 0101 1101 1000 ELPM 1 3 V3 ELPM 0, Z
1001 0101 1110 1000 SPM 1 V2
1001 010d dddd 0000 COM Rd 0-31 Z,C,N,V,S 1 1 Rd = 0xFF - Rd
1001 010d dddd 0001 NEG Rd 0-31 Z,C,N,V,S,H 1 1 Rd = 0x00 - Rd
1001 010d dddd 0010 SWAP Rd 0-31 1 1
1001 010d dddd 0011 INC Rd 0-31 Z,N,V,S 1 1 Rd = Rd + 1
1001 010d dddd 0101 ASR Rd 0-31 1 1
1001 010d dddd 0110 LSR Rd 0-31 1 1
1001 010d dddd 0111 ROR Rd 0-31 1 1
1001 010d dddd 1010 DEC Rd 0-31 Z,N,V,S 1 1 Rd = Rd - 1
1001 010k kkkk 110k kk... JMP k 0-4194304 2 3 V2E (>=16K)
1001 010k kkkk 111k kk... CALL k 0-4194304 2 4-5 V2E (>=16K)
1001 0110 KKdd KKKK ADIW Rd K 24,26,28,30 0-63 Z,C,N,V,S 1 2 Rd+1:Rd = Rd+1:Rd + K V1
1001 0111 KKdd KKKK SBIW Rd K 24,26,28,30 0-63 Z,C,N,V,S 1 2 Rd+1:Rd = Rd+1:Rd - K V1
1001 1000 AAAA Abbb CBI A b 0-31 0-7 1 2
1001 1001 AAAA Abbb SBIC A b 0-31 0-7 1 1-3
1001 1010 AAAA Abbb SBI A b 0-31 0-7 1 2
1001 1011 AAAA Abbb SBIS A b 0-31 0-7 1 1-3
1001 11rd dddd rrrr MUL Rd Rr 0-31 0-31 Z,C 1 2 R1:R0 = Rd x Rr (UU) V2E
1011 0AAd dddd AAAA IN Rd A 0-31 0-63 1 1
1011 1AAr rrrr AAAA OUT A Rr 0-63 0-31 1 1
10q0 qq0d dddd 0qqq LDD Rd Z+q 0-31 0-63 1 2 V1
10q0 qq0d dddd 1qqq LDD Rd Y+q 0-31 0-63 1 2 V1
10q0 qq1r rrrr 0qqq STD Z+q Rr 0-63 0-31 1 2 V1
10q0 qq1r rrrr 1qqq STD Y+q Rr 0-63 0-31 1 2 V1
1100 kkkk kkkk kkkk RJMP k -2048...+2048 1 2
1101 kkkk kkkk kkkk RCALL k -2048...+2048 1 3-4
1110 1111 dddd 1111 SER Rd 16-31 1 1 Rd = 0xFF LDI Rd, K
1110 KKKK dddd KKKK LDI Rd K 16-31 0-255 1 1
1111 00kk kkkk k000 BRCS k -64...+63 1 1-2 BRBS 0, k
1111 00kk kkkk k000 BRLO k -64...+63 1 1-2 BRBS 0, k
1111 00kk kkkk k001 BREQ k -64...+63 1 1-2 BRBS 1, k
1111 00kk kkkk k010 BRMI k -64...+63 1 1-2 BRBS 2, k
1111 00kk kkkk k011 BRVS k -64...+63 1 1-2 BRBS 3, k
1111 00kk kkkk k100 BRLT k -64...+63 1 1-2 BRBS 4, k
1111 00kk kkkk k101 BRHS k -64...+63 1 1-2 BRBS 5, k
1111 00kk kkkk k110 BRTS k -64...+63 1 1-2 BRBS 6, k
1111 00kk kkkk k111 BRIE k -64...+63 1 1-2 BRBS 7, k
1111 00kk kkkk ksss BRBS s k 0-7 -64...+63 1 1-2
1111 01kk kkkk k000 BRCC k -64...+63 1 1-2 BRBC 0, k
1111 01kk kkkk k000 BRSH k -64...+63 1 1-2 BRBC 0, k
1111 01kk kkkk k001 BRNE k -64...+63 1 1-2 BRBC 1, k
1111 01kk kkkk k010 BRPL k -64...+63 1 1-2 BRBC 2, k
1111 01kk kkkk k011 BRVC k -64...+63 1 1-2 BRBC 3, k
1111 01kk kkkk k100 BRGE k -64...+63 1 1-2 BRBC 4, k
1111 01kk kkkk k101 BRHC k -64...+63 1 1-2 BRBC 5, k
1111 01kk kkkk k110 BRTC k -64...+63 1 1-2 BRBC 6, k
1111 01kk kkkk k111 BRID k -64...+63 1 1-2 BRBC 7, k
1111 01kk kkkk ksss BRBC s k 0-7 -64...+63 1 1-2
1111 100d dddd 0bbb BLD Rd b 0-31 0-7 1 1
1111 101r rrrr 0bbb BST Rr b 0-31 0-7 1 1
1111 110r rrrr 0bbb SBRC Rr b 0-31 0-7 1 1-3
1111 111r rrrr 0bbb SBRS Rr b 0-31 0-7 1 1-3
136 instr.